(a) Field of the Invention
The present invention relates to a semiconductor package board using a metal base, a semiconductor device using the semiconductor package, and a manufacturing method thereof More specifically, the present invention relates to a semiconductor package board having excellent smoothness in a part on which a semiconductor chip is mounted, thereby improving reliability of the semiconductor device, and to a manufacturing method of such semiconductor package board.
(b) Description of the Related Art
Ceramic multilayer wiring boards, each of which mounts thereon a semiconductor chip, for example, enable high-density interconnections to be formed and are widely used. Such ceramic multilayer wiring boards are described in Japanese Patent Laid-open Publication No. Hei. 8-330474. The ceramic multilayer wiring board described in this publication includes an insulating board made of alumina or the like on which a conductor pattern made of a metal having a high melting point such as tungsten or molybdenum is formed. The insulating board is formed with a recess in which a semiconductor chip is received, and the recess is sealed by a covering member.
Japanese Patent Laid-open Publication No. Hei. 11-17058 and Japanese Patent No. 2679681 describe a build-up board or a multilayered printed circuit board, in which organic resin is used for the insulating material, and a fine-pitch circuit is constructed of copper interconnections formed by etching or plating. A multilayer wiring board which uses organic resin for the insulating material is also considered applicable for multi chip modules (MCM) mounted with a large number of semiconductor chips. The build-up board in which thin films of insulating layers are deposited on a printed circuit board in several layers allows a fine-pitch circuit to be formed on a surface layer, and thus offers advantages for increasing the circuit density.
Japanese Patent Laid-open Publication No. 2000-58701 describes a tape-type board in the form of a chip size package (CSP) and a ball grid array (BGA) including a polyimide film on which copper interconnections are formed.
However, the above-mentioned prior art has the following problems. Ceramic used for the insulating board in the ceramic multilayer wiring board is hard and brittle, and consequently it is apt to chip or crack during fabrication and transfer. Chipping or cracking of the board deteriorates the sealing property of the semiconductor chip rendering it defective, and leads to a decrease in the yield of the ceramic multilayer wiring boards.
Generally, the ceramic multilayer wiring board is fabricated by printing electrically conductive patterns on green sheets followed by stacking them, and then baking the stacked sheets. There is inevitably warpage in the baked board because of the shrinkage caused by baking at a high temperature, resulting in defective products due to deformation or dimensional variations. Such products which do not satisfy the physical requirements cannot provide a high degree of smoothness required for a high-density circuit board or a flip-chip mounting board. That is, physical defects of the board constitute an impediment to a further increase in the number of pins or the density of the circuit and to further miniaturization of the circuit. Poor smoothness in a region where a semiconductor chip is mounted causes cracks or disconnections between the flip-chip mounted semiconductor chip and the board. As a result the reliability of the semiconductor device is lowered.
Build-up boards are apt to warpage because of the mismatches in the coefficient of thermal expansion between the printed circuit board used as a core material and the insulating resin film formed on the board. Such warpage also causes various problems when flip-chip bonding a multi-pinned semiconductor chip impeding further increase in the circuit density. Warpage also decreases the yield of the build-up board.
Tape-type boards made of polyimide have a drawback that position misalignment often occurs because of the expansion of the tape carrier, and therefore it is not suitable for higher density circuit formation.
Moreover, in conventional semiconductor packages, a semiconductor chip is mounted on a multilayer wiring structure film which is formed on a board. Therefore, the region on which the semiconductor chip is mounted is often undulated because of the multi-layered structure, and consequently the connection between the semiconductor chip and the multilayer wiring structure film is unstable.
Furthermore, conventional semiconductor devices require a stiffener for increasing the rigidity of the board. Where, for example, a large heat sink is provided for covering a plurality of semiconductor chips stiffeners are interposed between the board and the heat sink in the gaps between adjacent semiconductor chips. While the board can have a higher rigidity because of the stiffeners, the provision of such stiffeners makes the fabrication process more complex, and increases the production cost of the semiconductor device.